The present inventive concept relates to a voltage generator and a memory device including same. More particularly, the inventive concept relates to a voltage generator capable of reducing current consumption and generating a stable voltage level, as well as a memory device including such a voltage generator.
Flash memories, which are non-volatile memories, may be classified into NOR type flash memories and NAND type flash memories according to the type of logic connection provided between each memory cell and a corresponding bitline. In general, NOR type flash memories are disadvantageous in applications demanding high integration density because they consume more current than NAND flash memories. However, NOR type flash memories better accommodate high speed operations.
More recently, multi level memory cells (MLCs) have been incorporated into flash memories in order to further increase integration density, i.e., data storage capacity per unit size are of the constituent memory device. However, flash memories including MLCs require highly stable (i.e., exhibiting very small voltage level variations) operating voltage(s) in order to properly program, erase, and read data. Such operating voltage(s) are routinely provided by voltage generation circuit(s).
Many conventional voltage generation circuits associated with flash memory devices include a plurality of charge pumps. The conventional voltage generation circuit intermittently drives all of the plurality of charge pumps even when the flash memory is in a standby state, thereby maintaining a constant output voltage level. As a result, the plurality of charge pumps needs to perform pumping operations even when the flash memory device is in a standby state so that a stable voltage may be readily applied to the constituent flash memory array and a rapid data readout achieved. During this process, the plurality of charge pumps may maintain an at least a desired constant voltage level by alternating between two closely associated voltage levels.
In other words, the plurality of charge pumps may be charged to a defined voltage level by performing a high-speed charge pumping operation to a higher voltage level, and then allowing the higher voltage level to settle back to the defined voltage level by means of charge leakage inherent in the circuit operations of the flash memory when the pumping operation is halted. Then, when the voltage returns to the defined voltage level, the plurality of charge pumps begins the pumping operation again. In this manner, the plurality of charge pumps provides a pumping operation that essentially alternates between two voltage levels. Unfortunately, the stability of this pumping operation is relatively low when the difference between the defined voltage and higher voltage is relatively large. And when the difference between these two voltages is reduced to improve stability of the provided voltage, the ON/OFF frequency of pumping operation must be increased during the standby state, thereby causing a corresponding increase in current consumption.